Farfong Lee

Farfong Lee is a seasoned senior PCB layout design engineer with extensive experience in the electronics industry. Currently employed at Aeva since March 2021, Farfong is specializing in PCB design for a complex FPGA debug board. Previous roles include principal PCB layout design engineer positions at Empower Semiconductor and Lam Research, where Farfong contributed to transitioning schematic files and layouts using tools such as Allegro and OrCad. Collaborative PCB layout consultancy work was performed at Gerson Lehrman Group, while significant designs were completed for innovative products at Keyssa and Avogy Inc. Farfong's background also includes experience at Microsoft and Super Talent Technology, where key designs were executed for consumer electronics and memory modules, respectively. Farfong holds a Master’s degree in Electrical and Electronics Engineering from New York University - Polytechnic School of Engineering.