Mark Andrews

Mark Andrews is an accomplished engineer with extensive experience in RTL and ASIC design spanning several decades. Currently serving as a Staff RTL Engineer at Astranis since May 2021 and as a Senior RTL Engineer since October 2019, Mark previously held the position of Senior Staff ASIC Design Engineer at EFI from August 1997 to October 2019, where significant contributions included the development of ASIC memory management controllers and advanced video processing modules. Earlier in the career, Mark worked as a Senior Hardware Engineer at Dolby Laboratories and as a Design Engineer at Abekas Video Systems, achieving innovations in DSP-based testing solutions and ASIC development for professional video products. Mark holds a BSc in Electrical and Electronic Engineering from the University of Birmingham.