JN

Jyothsna Nalagasula

Senior Engineer -II at Ceremorphic

Jyothsna Nalagasula has been working in the engineering field since 2009. Jyothsna began as a student at gprec, then moved to Redpine Signals as a Design Engineer in 2016. In 2018, they joined AMD as a Silicon Design Engineer II, and currently holds the role of Senior Engineer II at Ceremorphic, Inc. since 2021.

Jyothsna Nalagasula obtained a Master of Technology (M.Tech.) degree in VLSI/ES from JNTU Anantapur between 2014 and 2016. Prior to that, they obtained a Bachelor of Technology (B.Tech.) degree in Electrical, Electronics and Communications Engineering from Sri Krishnadevaraya University between 2009 and 2013.

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Hyderābād, India

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Ceremorphic

Ceremorphic has built a new architecture that delivers the performance required for next generation applications such as AI model training, HPC, drug discovery and metaverse processing.