Shashanka M.

Shashanka M. has a comprehensive work experience in the field of digital design and research. Shashanka is currently working as a Digital Design Engineer at Innatera Nanosystems since January 2021.

Prior to this, Shashanka worked as a Research and Development Engineer at Technische Universiteit Delft from February 2020 to December 2020. In this role, they were involved in the design and verification of digital IP blocks, development of a high-speed communication protocol, and the successful validation of two Neuromorphic Computing chips.

Before that, Shashanka was a Master Thesis Student at Technische Universiteit Delft from January 2019 to November 2019. During this time, they developed a systolic array simulator for Convolution Neural Networks as part of the PRYSTINE project. Shashanka also explored different sensor subsystems and compute architectures for near sensor computing systems.

Shashanka also had a role as a Student Research Assistant at Technische Universiteit Delft from September 2018 to December 2018, where they focused on the exploration and optimization of hardware and algorithms for near sensor computing systems.

Shashanka'searlier work experience includes being a Graphics Hardware Engineer at Intel Corporation from July 2015 to June 2017. In this role, they were responsible for the design and validation of Functional DFT IP for Graphics unit, including test plan creation, automation, and post-silicon validation support.

Overall, Shashanka M. has gained expertise in digital design, verification, prototyping, simulation, and optimization of hardware and algorithms in the field of neuromorphic computing and graphics hardware.

Shashanka M. pursued a Bachelor's Degree in Electronics and Communication Engineering from B. M. S. College of Engineering between the years 2011 and 2015. Following this, they enrolled in Delft University of Technology from 2017 to 2019, where they completed a Master of Science degree in Computer Engineering.