Narasimhan V.

Narasimhan V. is a highly experienced engineer specializing in RF and mixed-signal design. Currently serving as a Senior Principal RF/MS Engineer at MaxLinear since May 2020, Narasimhan V. focuses on 400Gbps and 800Gbps optical transceiver architecture and circuit design. Prior to this role, Narasimhan V. held the position of Senior Analog Design Manager at INVECAS, where responsibilities included analog design of 25Gbps/32Gbps Serdes receivers and clocking, as well as LPDDR3/4 architecture. Earlier experience includes a role as Staff Engineer at Qualcomm, concentrating on PHY architecture for LPDDR3 and PCDDR3/4 and USB transceiver design, and as Staff IC Design Engineer at Xilinx, where design work involved DLL and DDR3 clocking for Virtex-7 series and PLL clocking for Spartan-6. Narasimhan V. holds both a Doctor of Philosophy (PhD) and a Master of Science (MS) in Electrical Engineering from Duke University.