Menta SAS
Yoan Dupret is a seasoned professional with extensive experience in the semiconductor industry, currently serving as Managing Director and CTO at Menta SAS since March 2016, where also holds the role of VP Business Development and previously, Business Development Director. Prior experience includes a position as Design & EDA Manager at DelfMEMS, where managed a multi-disciplinary engineering team and established a team providing IT, EDA, and PDK services. Yoan's career also includes roles at Samsung Cambridge Solutions Center as Staff PDK Engineer, CSR as Senior PDK Engineer, Infineon Technologies as DfM Engineer, and Altis Semiconductor as a PhD student focused on analog IP modeling. Educational qualifications include a PhD in Semiconductor Statistics from CentraleSupélec, a DEA in Analogue Design and CMOS from Pierre and Marie Curie University, and an engineering degree in Electronic and Computer Sciences from Eseo.
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Menta SAS
Menta delivers standard-cell based, embedded FPGA IPs in RTL and GDS2 format, for SoC, ASIC or ASSP designs. Our technology lets you effortlessly update your silicon post-production, whether to fix a bug, implement customer-specific features, adapt to evolving standards, or enhance security. Menta IPs are delivered with standard EDA tools, and support process technologies and nodes from any vendor (TSMC, GF... from 350nm all the way down to 3nm).