Jialue Wang

Jialue Wang is a seasoned engineer specializing in analog integrated circuit design, currently serving as a Senior Principal Analog Design Engineer at Nexperia since 2020, where responsibilities include the development of Power Management IC products and translating product functional requests into circuit specifications. Previous roles include Principal Analog IC Design Engineer at Nexperia and Analog IC Design Engineer at Nowi, where Jialue led I2C Bus Repeater design and developed a switched capacitor DC-DC converter, respectively. Earlier experience includes contributions to voltage level translators and RF energy harvesting systems at imec, complemented by advanced academic training with a Doctorate and Master's degrees in Electrical and Electronics Engineering from Eindhoven University of Technology and Delft University of Technology.