Ayush Singhal

Ayush Singhal is a seasoned engineer with extensive experience in the semiconductor and engineering sectors. Currently serving as a CAD and Methodology PD Engineer at NUVIA Inc since April 2019 and as a Physical Design Engineer at NVIDIA since June 2017, Ayush focuses on GPU timing. Previously, Ayush held a Design Engineer Intern position at Intel Corporation, where involvement included developing a pattern database for DFM and DRC error verification, among other projects. Earlier roles include a Research Associate at Evalueserve, where technology analysis supported client litigation activities, and a Software Engineer at Aricent, where advanced technical training was completed. Ayush's formative experience includes internships and trainee positions across various companies, providing a strong foundation in electronics and engineering. Educational credentials include a Master of Science in Electrical and Electronics Engineering from the University of Minnesota and a Bachelor of Engineering in Electronics and Communication from Panjab University.