• NUVIA

  • Gandhi Rajan Ramachandran

Gandhi Rajan Ramachandran

Soc Physical Design Engineer at NUVIA

Gandhi Rajan Ramachandran is a skilled engineer specializing in SoC physical design, currently employed at NUVIA Inc since June 2022. Prior experience includes a role as a DSP IC Design Engineer at Xilinx from February 2020 to May 2022, where contributions involved EMIR analysis and HSpice-PT correlation, enhancing efficiency and accuracy in design processes. Gandhi also interned at Xilinx as a System Engineering Intern in 2019, focusing on prototype development using FPGAs and multi-team system debugging. Earlier experience includes working as a Research Assistant at Solarillion Foundation on projects in gesture recognition and smart grids. Educational credentials include a Master's degree in Electrical Engineering from the University of Southern California (2018-2019) and a Bachelor's degree in Electrical and Electronics Engineering from Sri Venkateswara College of Engineering (2012-2016).

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Bengaluru, India

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NUVIA

Nuvia develops processors intended to create high-performance silicon design for a compute-intensive world.It designs processing chipsets for data center servers, thereby delivering a faster, power-efficient, and secure experience to existing data center processors.


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51-200

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