Senior Digital/Mixed-Signal Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include development and verification of the digital controller for high performance data converters, behavioral modeling, customer support, and to assist with synthesis and place-and-route flow for the digital controller for high performance data converters.
Qualifications
- BS + 4 years or equivalent experience in high-performance digital or mixed-signal IC development in advanced CMOS processes
- Deep knowledge of Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc
- Strong understanding of digital design for mixed signal control loops and designing Verilog code to control analog circuits (e.g. digital backend for ADC, digital PLL, etc)
- Familiarity with behavioral Verilog code, including wreals
- Ability to write thorough testbenches
- Preferred knowledge of synthesis tool
- Basic understanding of SystemVerilog and assertions preferred
- Familiarity with place and route tool flow preferred but not mandatory
- Basic understanding of signal processing – MATLAB understanding would be preferred but not mandatory
- Extensive experience with synthesis flow in nano-meter scale CMOS
- Extensive experience with place and route flow
- Deep understanding of constraints, especially for mixed-signal designs, including multiple clock domains and clock gating
- Familiarity with timing closure and static timing analysis tools
- Experience with scan chain vector generation and verification
- Familiarity with Cadence Encounter tool flow preferred but not mandatory