Palo Alto Networks
Eric Gu is an experienced hardware engineer with a career spanning over two decades in the semiconductor and technology industries. Currently employed at Palo Alto Networks since December 2013, Eric specializes in ASIC verification. Prior to this role, Eric served as a Senior Staff Design Verification Engineer at Samsung Semiconductor Inc, focusing on ARM-based SOC design verification using UVM/OVM and System Verilog. At PLX Technology, Eric was a Verification Lead and contributed to PCI-Express switch/bridge product lines, utilizing RVM/VMM methodologies and Object-Oriented Programming. Eric began the career as a Senior Software Engineer at Teradyne, where skills in C/C++ were applied to develop drivers and diagnostic algorithms for semiconductor test equipment. Eric holds degrees from the University of Arizona, Zhejiang University, and completed secondary education at Hangzhou High School.
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Palo Alto Networks
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We are the global cybersecurity leader, known for always challenging the security status quo. Our mission is to protect our way of life in the digital age by preventing successful cyberattacks. This has given us the privilege of safely enabling tens of thousands of organizations and their customers. Our pioneering Security Operating Platform safeguards your digital transformation with continuous innovation that combines the latest breakthroughs in security, automation, and analytics. By delivering you a true platform and empowering a growing ecosystem of change-makers like us, we provide you highly effective and innovative cybersecurity across clouds, networks, and mobile devices. Across the world, customers love our security and consistently award us the highest loyalty ratings and net promoter scores in the industry.