Roberto Paiva

Roberto Paiva is a seasoned Sr. Principal FPGA/ASIC Design Engineer at RED Digital Cinema, with a progressive career that includes roles as Principal and Senior FPGA/ASIC Design Engineer since December 2021. Prior experience at Ross Video includes serving as Architect for Hyperconverged IP HW Solutions and Senior FPGA Developer from September 2016, following the acquisition of COVELOZ Technologies Inc. where Roberto worked as an FPGA Designer focused on multi-rate 100G OTN Muxponder FPGA integration and verification. Earlier roles include FPGA Design Engineer at DATACOM, with responsibilities in designing high bandwidth transport network equipment, and FPGA Designer at GAPH/PUCRS involved in a research project. Roberto’s career began with a position as a Software Tester at Hewlett-Packard in a collaborative research partnership. Roberto holds a Bachelor’s degree in Computer Engineering from Pontifícia Universidade Católica do Rio Grande do Sul, completed in 2007.