Wentao Li

Wentao Li is a Principal Engineer with experience spanning over 15 years. Wentao has been working at Silicon Laboratories since 2008, starting as a Senior Design Engineer and progressing to the role of Principal Engineer. In their current position, they lead the demodulator design effort for low power wireless SOC chips, focusing on improving performance and features. Wentao also collaborates with the system/algorithm and firmware teams to ensure performance and power efficiency. Prior to joining Silicon Laboratories, they worked at Integration Associates as a Senior Logic/DSP Design Engineer and at 1021 Technologies, Inc. as a Senior ASIC Design Engineer.

Wentao Li holds a Bachelor of Engineering degree in Wireless from Huazhong University of Science and Technology in P.R. China. Wentao also completed a Master of Science in Electrical Engineering with a specialization in DSP in Communications Systems at the University of Saskatchewan in Canada.