Harish Kumar Enumula

Harish Kumar Enumula is a seasoned Senior Physical Design Engineer currently employed at Sintegra Inc. and Google since February 2025. Harish has previously held senior engineering positions at GUC, TSMC, and Apple, working extensively on advanced technologies such as 28nm, 7nm, and 6nm. Notable contributions include resolving block-level issues and delivering solutions for NXP ODC and AMD ODC projects. Prior experience includes a role as a VLSI Physical Design Engineer at Wipro and a trainee position in Physical Design at VEDA IIT, where Harish gained expertise in various scripting languages. Harish holds a Bachelor of Technology degree in Electronics and Communication Engineering from SR University, completed in 2018.