Nai-Chen Cheng

Nai-Chen Cheng is a Principal Engineer at 台積電 since August 2017, specializing in high-speed serdes design. Additionally, Nai-Chen serves as an Engineer at ITRI since January 2006, focusing on mixed signal IC design, and has held the role of Project Lead on a low-power RF project that includes a wake-up receiver and BAN. Nai-Chen Cheng earned a Master’s Degree in VLSI circuit design from National Cheng Kung University from 2003 to 2005 and a Bachelor’s Degree in Electrical and Electronics Engineering from NCKU from 1999 to 2003.