Prabhat Jain

Prabhat Jain is an experienced SoC Performance Architect at Arm since February 2020, previously serving as an SoC Interconnect Performance Architect at AMD from May 2018 to December 2019, where contributions included addressing QoS issues in client SoCs and working on data Fabric architecture for a variety of products. Prior experience includes serving as a Processor Core Architect at Intel Corporation from September 2012 to March 2018, overseeing the L2 H/W Prefetcher architecture and the performance architecture of the L2 cache cluster for Knights Landing and Knights Hill processors. Prabhat began a research assistant position at the University of Illinois at Urbana-Champaign between August 2010 and July 2012, collaborating on a DARPA-funded UHPC project focused on designing an energy-efficient exascale machine. Academic credentials include a Master of Science in Computer Science from the University of Illinois Urbana-Champaign and a Bachelor of Technology in Computer Science from the Indian Institute of Technology, Madras.