Astera Labs
Andrew (Anh) Tran, PhD, is a distinguished engineering professional with extensive experience in the semiconductor and technology industries. Currently serving as a Distinguished Member of Technical Staff at Astera Labs since March 2020, Andrew focuses on high-speed connectivity solutions and low-latency memory chips for data centers, actively recruiting digital design, verification, and firmware engineers. Previously, Andrew held the position of CTO at a Stealth Startup, where a machine learning model compiler and real-time software-defined ML systems were developed. As a founding member at OURS Technology Inc., Andrew contributed to the development of AI processors utilizing RISC-V architecture. Andrew's experience includes roles as a Senior Lead ASIC Designer at Cavium Inc. and as a member of technical staff at XPliant, where ASICs for next-generation network switches were developed. Academic credentials include a PhD and MS in Electrical Engineering from the University of California, Davis, and a BS in Electronics Engineering from the Posts and Telecommunications Institute of Technology in Vietnam.
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Astera Labs
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Purpose-built connectivity solutions to remove performance bottlenecks in compute-intensive workloads, such as AI and machine learning