Luis Alberto Chavez Morfin

Luis Alberto Chavez Morfin is an accomplished Sr Staff Silicon Validation Engineer at Marvell Technology since September 2024, previously holding the position of Staff Silicon Validation Engineer at The Six Semiconductor. Experience encompasses extensive roles in silicon validation, with responsibilities including LPDDR PHY validation, silicon testing for high-speed analog integrated circuits, and the development of testing methodologies across various companies such as Synopsys Inc and Continental. Educational background includes a Bachelor of Applied Science in Electrical, Electronics, and Communications Engineering from Universidad de Guadalajara and a technology degree from CETI Colomos. Career beginnings include positions in mechanical repair and test engineering at RAL Automotriz and Jabil.