Gang Yuan

Gang Yuan is a Principal Design Engineer at Silicon Labs since April 2022, following a tenure as Director of IC Design at Telink Semiconductor from May 2020 to March 2022. Previously, Gang Yuan worked at Silicon Laboratories from October 2007 to May 2020, holding the positions of Design Manager and Senior Design Engineer, where significant contributions included leading an analog mixed-signal circuit design team and architecting a new generation FM/AM/SSB receiver system. Early professional experience consists of serving as an Analog/RF Design Engineer at Sourcecore Microelectronics from September 2005 to September 2007, developing schematics for wireless receivers. Gang Yuan holds a Ph.D. in ICS from The University of Texas at Austin (2015-present) and both an MSEE and BSEE in Electronic/Electronics Engineering from Xi'an Jiaotong University (2004-2007 and 2000-2004, respectively).